Expression Rematerialization for VLIW DSP Processors with Distributed Register Files

Spill code is the overhead of memory load/store behavior if the available registers are not sufficient to map live ranges during the process of register allocation. Previously, works have been proposed to reduce spill code for the unified register file. For reducing power and cost in design of VLIW DSP processors, distributed register files and multibank register architectures are being adopted to eliminate the amount of read/write ports between functional units and registers. This presents new challenges for devising compiler optimization schemes for such architectures. This paper aims at addressing the issues of reducing spill code via rematerialization for a VLIW DSP processor with distributed register files. Rematerialization is a strategy for register allocator to determine if it is cheaper to recompute the value than to use memory load/store. In the paper, we propose a solution to exploit the characteristics of distributed register files where there is the chance to balance or split live ranges. By heuristically estimating register pressure for each register file, we are going to treat them as optional spilled locations rather than spilling to memory. The choice of spilled location might preserve an expression result and keep the value alive in different register file. It increases the possibility to do expression rematerialization which is effectively able to reduce spill code. Experiments were done for the PAC VLIW DSP processor and based on Open64 compiler infrastructures. Early experimental results show that our approach can reduce memory access operations due to the well-partitioned live ranges and well-rematerialized expression values.